VHDL Tutorial 18: Design a T flip-flop (with enable and an active high reset input) using VHDL
T Flip Flop Explained in Detail - DCAClab Blog
flipflop - Building a T flip-flop with enable and reset using only a JK flip -flop that has no enable or reset, and use some necessary logic gates - Electrical Engineering Stack Exchange
Flip-flop (electronics) - Wikipedia
T Is for Toggle: Understanding the T Flip-Flop - Technical Articles
Verilog | T Flip Flop - javatpoint
PPT - Classification of Digital Circuits PowerPoint Presentation, free download - ID:335729
flipflop - Building a T flip-flop with enable and reset using only a JK flip -flop that has no enable or reset, and use some necessary logic gates - Electrical Engineering Stack Exchange